Product Overview
256Mb DDR2-667 SDRAM, 16M x 16 in Four Banks, 84-Ball FBGA, 1.8 V
Condition
Condition: unused new old stock (NOS). Sold each. Markings legible: SAMSUNG / K4T56163QI-ZCE6.
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Product Overview
A 256 Mbit DDR2 SDRAM from Samsung's I-die generation, the K4T56163QI-ZCE6 is organized as 4 Mbit x 16 I/Os x 4 banks (16M x 16). Its E6 speed bin runs DDR2-667 at 5-5-5 timing, in the 84-ball FBGA Samsung uses for its x16 DDR2 parts.
Key Features
- Density: 256 Mbit (32 MB)
- Organization: 16M x 16, as 4 Mbit x 16 I/Os x 4 banks
- Die revision: I-die
- Speed bin E6: DDR2-667, CL-tRCD-tRP 5-5-5; tRCD and tRP 15 ns minimum
- Supply: JEDEC standard 1.8 V +/- 0.1 V on VDD and VDDQ
- Programmable CAS latency 3 to 6, additive latency 0 to 5, burst length 4 or 8
- On-die termination
- Average refresh period 7.8 us below 85 degC case temperature
- Package: 84-ball FBGA, Pb-free, RoHS compliant
Applications
- Replacing a failed x16 DDR2 position on an embedded controller, router or display board whose memory is called out as K4T56163QI-ZCE6
- BGA rework: reballing or reflowing a matched chip onto a board where the original tested bad
- Keeping spares on hand for a DDR2-era product still in field service
Frequently Asked Questions
Is this DDR2-667 or DDR2-800?
DDR2-667. The E6 speed bin is DDR2-667 at 5-5-5 (CL-tRCD-tRP).
How much storage is 256Mb?
256 megabits, which is 32 megabytes per chip. A 16-bit bus needs one chip; a 32-bit bus pairs two.
Is this the low-power version?
No. ZC is the standard-power version. The low-power version carries an L after the ZC.
Eighty-four solder balls on a 1.8 V rail, sized for the x16 DDR2 position the board was built around. Set the quantity, warm up the rework station, and the next chapter is yours.
