Product Overview
Texas Instruments SN7400W Quad 2-Input NAND Gate - 14-Pin Ceramic Flatpack, Date Code 6808A, Unused NOS
Condition
Unused new old stock. Markings legible: SN7400, Texas Instruments logo, and date code 6808A confirmed on package. Gold-plated leads are straight with no visible deformation or oxidation. Light surface patina on lid consistent with age. Evaluation: Visual inspection only. Function testing not performed.
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Product Overview
Texas Instruments SN7400W - a 14-pin ceramic flatpack carrying four independent 2-input NAND gates in the standard TTL logic family. Date code 6808A places manufacture in the 8th week of 1968. The W-suffix designates the ceramic flatpack form factor with a gold-plated lid and flat gold leads, distinct from the plastic DIP (N suffix) and ceramic DIP (J suffix) variants. Housed in its green plastic Mech-Pak transport carrier. The 7400 series was a foundational building block of early digital computing, and the ceramic flatpack variant is among the rarest surviving forms.
Key Features
- Four independent 2-input NAND gates - logic outputs Low only when both inputs are High
- 14-pin ceramic flatpack (W-package) with gold-plated lid and flat gold leads
- Date code 6808A - manufactured 8th week of 1968
- Standard TTL logic family, 5.0V DC supply (nominal range 4.75V to 5.25V)
- Commercial temperature range: 0°C to 70°C
- Shipped in original green plastic Mech-Pak carrier
- Incompatible with standard 14-pin DIP sockets or layouts without an adapter
- Incompatible with low-voltage logic systems (1.8V, 2.5V, 3.3V CMOS) without level translation
Applications
- Aerospace and military system restoration: identifies a failed logic gate on a vintage flatpack-layout PCB, desolders the damaged IC, aligns gold leads to the original surface-mount pads, and hand-solders each lead with a fine-tip iron under controlled temperature profiles
- Vintage computing restoration: replaces a failed gate in early 1960s-1970s mainframe subsystems or laboratory instruments where the original PCB footprint accepts only W-package flatpacks
- Collection and archival display: examined under magnification for date code and marking verification, cleaned, and mounted in a shadow box, display case, or archival tray as a documented 1968 semiconductor specimen
- Educational demonstration of early TTL gate architecture and the historical progression from DTL to TTL logic families
- Maker and hobbyist breadboard experiments using a TTL-to-breadboard adapter for a working piece of 1960s logic
Frequently Asked Questions
Is the pinout the same as a standard 14-pin DIP SN7400?
Not necessarily. In standard DIP packages (N and J suffix), VCC is Pin 14 and GND is Pin 7. Early ceramic flatpacks (W-package) can differ in power and ground pin assignments depending on the specific revision. Verify the exact W-package pinout against the historical Texas Instruments TTL Data Book for this part before applying power.
Will this drop into a standard 14-pin DIP socket?
No. The W-package ceramic flatpack has flat gold leads that extend from the sides of the body - it is not compatible with standard DIP sockets or DIP-footprint PCB layouts. It requires a PCB footprint designed specifically for a 14-pin ceramic flatpack, or a dedicated flatpack-to-DIP adapter.
What does the date code 6808A mean?
6808A indicates manufacture in the 8th week of 1968 at Texas Instruments. The date code is molded into the package and confirmed by visual inspection of this specific unit.
Is the Mech-Pak carrier included?
Yes. The IC is housed in its green plastic Mech-Pak transport carrier.
What is the functional status?
Unused new old stock. Visual inspection confirms straight, undamaged gold leads and legible markings. Function testing has not been performed. Buyers using this in active circuits should verify performance before committing to a critical application.
A quad NAND gate born in 1968 and never soldered - gold lid still intact, leads still straight, Mech-Pak still doing its job. Wherever it lands next, it arrives as the original article.
